A study on extended-drain MOS transistors in SOI technology has been published by Maryline Bawedin et al. in Solid-State Electronics 2004, pp. 2263-2270, under title “LDMOS in SOI Technology With Very-Thin Silicon film” (hereby incorporated by reference).
FIG. 1 is a copy of FIG. 1 of the above-referenced article. It shows an extended-drain MOS transistor formed in a thin silicon layer 1 positioned on a thin buried oxide layer 2, itself positioned on a silicon substrate 3. The MOS transistor comprises a heavily-doped N-type source region 4 (N+), a lightly-doped P-type channel-forming region 5 (P−), an N-type doped drain extension region (Drift Zone) 6, and a heavily-doped N-type drain region 7 (N+). The channel-forming region and an adjacent portion of the drift zone are covered with a gate (Front Gate) 8. In the drawing, only the gate insulator is shown. The silicon substrate is used as a back gate (Back Si Gate). The advantage of such an extended-drain MOS transistor is that it enables to withstand higher voltages than what is allowed by conventional MOS transistors of same technology. For example, in a technology where conventional MOS transistors are adapted to power supply voltages in the order of 2 volts, the extended-drain MOS transistor may withstand voltages greater than 5 volts.
The authors of the article demonstrate in their FIG. 9, copied in FIG. 2 of the present disclosure, the horizontal electric field distribution in volt/cm according to the position (X) in the horizontal direction. Three field peaks can be observed, the first one at the limit between the channel and the drift zone, the second one at the limit of the gate above the drift zone, and the third one at the limit between the drift zone and the drain. In this drawing, circles show the horizontal electric field distribution for a first doping level (1017 at./cm3) of the drift zone and squares show the field distribution for a second doping level (4.1016 at./cm3) of the drift zone.
Further, generally, an extended-drain transistor has the advantage of having a higher breakdown voltage than a transistor with no extended drain, of same technology, but has the disadvantage of having a greater conduction resistance (Ron) due to the current flow in the medium-doped drift zone.